-
1
-
-
85153367042
-
-
Fast packet switch architectures for broadband integrated services digital networks, vol. 78, pp. 133-167, Jan. 1990.
-
F. A. Tobagi, "Fast packet switch architectures for broadband integrated services digital networks," Proc. IEEE, vol. 78, pp. 133-167, Jan. 1990.
-
Proc. IEEE
-
-
Tobagi, F.A.1
-
2
-
-
0024733794
-
-
A survey of modern high-performance switching techniques, vol. 7, pp. 1091-1103, Sept. 1989.
-
H. Ahmadi and W. E. Denzel, "A survey of modern high-performance switching techniques," IEEE J. Select. Areas Commun., vol. 7, pp. 1091-1103, Sept. 1989.
-
IEEE J. Select. Areas Commun.
-
-
Ahmadi, H.1
Denzel, W.E.2
-
4
-
-
0027311411
-
-
Shared buffer memory switch for an ATM exchange, vol. 41, pp. 237-245, Jan. 1993.
-
N. Endo, T. Kozaki, T. Ohuchi, H. Kuwahara, and S. Gohara, "Shared buffer memory switch for an ATM exchange," IEEE Trans. Commun. vol. 41, pp. 237-245, Jan. 1993.
-
IEEE Trans. Commun.
-
-
Endo, N.1
Kozaki, T.2
Ohuchi, T.3
Kuwahara, H.4
Gohara, S.5
-
5
-
-
0023997481
-
-
PARIS: An approach to integrated high speed private networks, vol. 1, pp. 77-85, 1988.
-
I. Cidon and I. Gopal, "PARIS: An approach to integrated high speed private networks," Int. J. Digital Analog Cabled Syst., vol. 1, pp. 77-85, 1988.
-
Int. J. Digital Analog Cabled Syst.
-
-
Cidon, I.1
Gopal, I.2
-
6
-
-
0024124140
-
-
Real time packet switching: A performance analysis, vol. 6, pp. 1576-1586, Dec. 1988.
-
I. Cidon, I. Gopal, G. Grover, and M. Sidi, "Real time packet switching: A performance analysis," IEEE J. Select. Areas Commun., vol. 6, pp. 1576-1586, Dec. 1988.
-
IEEE J. Select. Areas Commun.
-
-
Cidon, I.1
Gopal, I.2
Grover, G.3
Sidi, M.4
-
7
-
-
33750468602
-
-
ATM support in a transparent network
-
I. Gopal, R. Guerin, J. Janniello, and V. Theoharakis, "ATM support in a transparent network," IEEE Network, pp. 62-68, Nov. 1992.
-
IEEE Network, Pp. 62-68, Nov. 1992.
-
-
Gopal, I.1
Guerin, R.2
Janniello, J.3
Theoharakis, V.4
-
8
-
-
85153390801
-
-
Output buffer switch architecture for asynchronous transfer mode
-
H. Suzuki, H. Nagano, T. Suzuki, T. Takeuchi, and S. Iwasaki, "Output buffer switch architecture for asynchronous transfer mode," in Proc. IEEE ICC'89, pp. 99-103.
-
Proc. IEEE ICC'89, Pp. 99-103.
-
-
Suzuki, H.1
Nagano, H.2
Suzuki, T.3
Takeuchi, T.4
Iwasaki, S.5
-
9
-
-
0023435613
-
-
Integrated services packet network using bus matrix switch, vol. SAC-5, pp. 1284-1292, Oct. 1987.
-
S. Nojima, E. Tsutsui, H. Fukuda, and M. Hashimoto, "Integrated services packet network using bus matrix switch," IEEE J. Select. Areas Commun., vol. SAC-5, pp. 1284-1292, Oct. 1987.
-
IEEE J. Select. Areas Commun.
-
-
Nojima, S.1
Tsutsui, E.2
Fukuda, H.3
Hashimoto, M.4
-
10
-
-
0028427784
-
-
High speed switching for ATM: The BSS, vol. 26, pp. 1225-1234, 1994.
-
C. Fayet, A. Jacques, and G. Pujolle, "High speed switching for ATM: The BSS," Comput. Networks ISDN Syst., vol. 26, pp. 1225-1234, 1994.
-
Comput. Networks ISDN Syst.
-
-
Fayet, C.1
Jacques, A.2
Pujolle, G.3
-
11
-
-
0000619466
-
-
A distributed control architecture of high speed networks, vol. 43, pp. 1950-1960, May 1995.
-
I. Cidon, I. Gopal, M. A. Kaplan, and S. Kutten, "A distributed control architecture of high speed networks," IEEE Trans. Commun., vol. 43, pp. 1950-1960, May 1995.
-
IEEE Trans. Commun.
-
-
Cidon, I.1
Gopal, I.2
Kaplan, M.A.3
Kutten, S.4
-
12
-
-
85153345864
-
-
Expandable ATOM switch architecture (XATOM) for ATM LAN's
-
R. Fan, H. Suzuki, K. Yamada, and N. Matsuura, "Expandable ATOM switch architecture (XATOM) for ATM LAN's," in Proc. IEEE ICC'94, pp. 402-409.
-
Proc. IEEE ICC'94, Pp. 402-409.
-
-
Fan, R.1
Suzuki, H.2
Yamada, K.3
Matsuura, N.4
-
13
-
-
0027632661
-
-
PR-Banyan: A packet switch with a pseudorandomizer for nonuniform traffic, vol. 41, pp. 1039-1042, July 1993.
-
Y. M. Kim and K. Y. Lee, "PR-Banyan: A packet switch with a pseudorandomizer for nonuniform traffic," IEEE Trans. Commun., vol. 41, pp. 1039-1042, July 1993.
-
IEEE Trans. Commun.
-
-
Kim, Y.M.1
Lee, K.Y.2
-
14
-
-
0028481336
-
-
The Helical switch: A multipath ATM switch which preserves cell sequence, vol. 42, pp. 2618-2629, Aug. 1994.
-
I. Widjaja and A. Leon-Garcia, "The Helical switch: A multipath ATM switch which preserves cell sequence," IEEE Trans. Commun., vol. 42, pp. 2618-2629, Aug. 1994.
-
IEEE Trans. Commun.
-
-
Widjaja, I.1
Leon-Garcia, A.2
-
15
-
-
0027540474
-
-
SCOQ: A fast packet switch with shared concentration and output queueing, vol. 1, pp. 142-151, Feb. 1993.
-
D. X. Chen and J. W. Mark, "SCOQ: A fast packet switch with shared concentration and output queueing," IEEE/ACM Trans. Networking, vol. 1, pp. 142-151, Feb. 1993.
-
IEEE/ACM Trans. Networking
-
-
Chen, D.X.1
Mark, J.W.2
-
16
-
-
0028378588
-
-
Broadband packet switches based on dilated interconnection networks, vol. 42, pp. 732-744, Feb. 1994.
-
T. T. Lee and S. C. Liew, "Broadband packet switches based on dilated interconnection networks," IEEE Trans. Commun., vol. 42, pp. 732-744, Feb. 1994.
-
IEEE Trans. Commun.
-
-
Lee, T.T.1
Liew, S.C.2
-
17
-
-
0028381935
-
-
vol. 42, pp. 754-766, Feb. 1994.
-
S. C. Liew and T. T. Lee, "N log N dual shuffle-exchange network with error-correcting routing," IEEE Trans. Commun., vol. 42, pp. 754-766, Feb. 1994.
-
N Log N Dual Shuffle-exchange Network with Error-correcting Routing, IEEE Trans. Commun.
-
-
Liew, S.C.1
Lee, T.T.2
-
19
-
-
0019032785
-
-
Analysis of shared finite storage in a computer network node environment under general traffic conditions, vol. COM-28, pp. 992-1003, July 1980.
-
F. Kamoun and L. Kleinrock, "Analysis of shared finite storage in a computer network node environment under general traffic conditions," IEEE Trans. Commun., vol. COM-28, pp. 992-1003, July 1980.
-
IEEE Trans. Commun.
-
-
Kamoun, F.1
Kleinrock, L.2
-
20
-
-
85153356214
-
-
Measuring the utilization of a synchronous data link: An application of busy period analysis, vol. 59, pp. 731-744, May 1980.
-
T. S. Yum, "Measuring the utilization of a synchronous data link: An application of busy period analysis," Bell Syst. Tech. J., vol. 59, pp. 731-744, May 1980.
-
Bell Syst. Tech. J.
-
-
Yum, T.S.1
|