A 0.9-V microcontroller for portable applications

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 7, 1997, Pages 1049-1054

  Wild, Andreas ^a,c,d,e   Quigley, John ^a,f,g   Feddeler, James ^b   Ledford, Steven ^b   Caravella, James ^a,h   Shapiro, Fred ^a   Gilsdorf, Ben ^a   Hong, Merit ^a,i   Mietus, Dave ^a,j,k,l   Davies, Robert B ^a,k   Parmar, Rajiv ^a,l,m,n   Tai, Jy Der ^a   Thomas, Jim ^b   Quarberg, June ^b,o   Hartung, Eytan ^a,b   Sawan, Tony ^a,b   Carlquist, Jim H ^a,b,p,q   Papworth, Ken ^a,b,r   Buxo, Juan ^a   Schriber, Mike ^b   Berens, Michael ^b   Warren, Drew ^b   Smith, Brynette ^b   Mazuelos, Michael ^b   Bass, Kim ^b   Layton, Larry ^b   more..

^a MOTOROLA INC   (United States)

^b MOTOROLA INC   (United States)

^c UNIVERSITY POLITEHNICA OF BUCHAREST   (Romania)

^d INSTITUTE OF ATOMIC PHYSICS   (Romania)

^e Motorola GmbH   (Germany)

^f Department of Environmental and Radiological Health Sciences   (United States)

^g Siemens Transmissions Systems

^h GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

ⁱ MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^j CLARKSON UNIVERSITY   (United States)

^k ARIZONA STATE UNIVERSITY   (United States)

^l Advanced Design Technology Group   (United States)

^m Center for Language and Brain   (United States)

ⁿ UNIVERSITY OF FLORIDA   (United States)

^o UNIVERSITY OF MINNESOTA   (United States)

^p Department of Obstetrics Gynecology   (United States)

^q UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^r UNIVERSITY OF LONDON   (United Kingdom)

more..

Author keywords

Low power; Low voltage; Microcontroller; One cell; Portable; Wireless

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK SYNTHESIS; LIQUID CRYSTAL DISPLAYS; PHASE LOCKED LOOPS; RANDOM ACCESS STORAGE; ROM; SECONDARY BATTERIES; TRANSISTORS;

MICROCONTROLLERS;

MICROPROCESSOR CHIPS;

EID: 0031185824     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.597295     Document Type: Article

References (7)

1. "CPU08 reference manual," CPURM/AD, Motorola, 1993.
2. J. P. John et al., "A low voltage graded-channel MOSFET (LV-GCMOS) for sub-1 V microcontroller applications," in 1996 Symp. VLSI Technol. Dig. Tech. Papers, p. 178.
3. A. P. Chandrakasan, S. Sheng, and R. W. Brodersen, "Low power CMOS digital design," IEEE J. Solid-Sate Circuits, vol. 27, p. 473, 1992.
4. R. Zimmermann and R. Gupta, "Low-power logic styles: CMOS vs CPL," in Proc. 22nd European Solid-State Circuits Conf., 1996, p. 112.
5. G. Yeap and A. Wild, "Introduction to low-power VLSI design," Int. J. High Speed Electron. Syst., vol. 7, no. 2, p. 223, 1996.
6. J. S. Caravella, "A low power one volt 4 KB SRAM design for embedded applications," presented at CICC'96.
7. C. Park et al., "Reversal of temperature dependence of integrated circuits operating at very low voltages," in IEDM Tech. Dig., 1995, p. 71.