IBM S/390 Parallel Enterprise Servers G3 and G4

IBM Journal of Research and Development

Volumn 41, Issue 4-5, 1997, Pages 397-402

  Rao, G S ^{a,b,c,d,e,f,g}   Gregg, T A ^a,h,i,j   Price, C A ^a,k,l,m   Rao, C L ^k   Repka, S J ^k  

^a IBM   (United States)

^b UNIVERSITY OF MYSORE   (India)

^c INDIAN INSTITUTE OF SCIENCE   (India)

^d STANFORD UNIVERSITY   (United States)

^e Rice University   (United States)

^f IBM T J WATSON RESEARCH CENTER   (United States)

^g Data Systems Division   (United States)

^h Proc Arch and Syst Struct Dept

ⁱ S 390 System Design Group

^j BROWN UNIVERSITY   (United States)

^k Poughkeepsie Laboratory ^*

^l PRATT INSTITUTE   (United States)

^m SYRACUSE UNIVERSITY   (United States)

more..

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; MICROPROCESSOR CHIPS; RESPONSE TIME (COMPUTER SYSTEMS);

MAINFRAME PLATFORM;

PARALLEL PROCESSING SYSTEMS;

EID: 0031177366     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.414.0397     Document Type: Article

References (5)

1. J. M. Nick, B. B. Moore, J.-Y. Chung, and N. S. Bowen, "S/390 Cluster Technology: Parallel Sysplex," IBM Syst. J. 36, No. 2, 172-201 (1997).
2. G. M. King, D. M. Dias, and P. S. Yu, "Cluster Architectures and S/390 Parallel Sysplex Scalability," IBM Syst. J. 36, No. 2, 221-241 (1997).
3. A Business Strategy Report to Customers, Order No. GF22-5005-00; 1997, available through IBM branch offices.
4. S/390 Technology Leadership, Order No. GF22-5008-00; 1997, available through IBM branch offices.
5. L. Gwennap, "Processor Performance Climbs Steadily," Microprocessor Report 9, No. 1, January 23, 1995.