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Volumn 5, Issue 2, 1997, Pages 186-196

Hierarchical interconnection structures for field programmable gate arrays

Author keywords

Field programmable gate array; FPGA architecture; Interconnection structure

Indexed keywords

ALGORITHMS; COMPUTER AIDED LOGIC DESIGN; INTERCONNECTION NETWORKS; LOGIC CIRCUITS; PROGRAM PROCESSORS;

EID: 0031169872     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.585219     Document Type: Article
Times cited : (46)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.