The M-machine multicomputer

International Journal of Parallel Programming

Volumn 25, Issue 3, 1997, Pages 183-212

  Fillo, Marco ^a   Keckler, Stephen W ^a   Dally, William J ^a   Carter, Nicholas P ^a   Chang, Andrew ^a   Gurevich, Yevgeny ^a   Lee, Whay S ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Coherence; Computer architecture; Multithreading; Parallelism

Indexed keywords

BUFFER STORAGE; DATA STORAGE EQUIPMENT; MICROPROCESSOR CHIPS; MULTIPROGRAMMING; PARALLEL PROCESSING SYSTEMS; SYNCHRONIZATION; USER INTERFACES;

MULTITHREAD PROCESSORS; ON CHIP CACHE; THREAD LEVEL PARALLELISM;

COMPUTER ARCHITECTURE;

EID: 0031169805     PISSN: 08857458     EISSN: None     Source Type: Journal    
DOI: 10.1007/BF02700035     Document Type: Article

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