Unified framework for the parallelization of divide and conquer based tridiagonal systems

Parallel Computing

Volumn 23, Issue 6, 1997, Pages 667-686

  Lopez J ^a   Plata, O ^a   Arguello F ^b   Zapata, E L ^a  

^a UNIVERSITY OF MÁLAGA   (Spain)

^b UNIVERSITY OF SANTIAGO DE COMPOSTELA   (Spain)

Author keywords

Cyclic reduction; Divide and conquer; Multiprocessor; Parallel architecture; Perfect shuffle unshuffle; R ary tree; Tridiagonal solvers

Indexed keywords

COMPUTER NETWORKS; DATA STRUCTURES; GEOMETRY; PARALLEL ALGORITHMS; PROBABILITY;

CYCLIC REDUCTION; TRIDIAGONAL SOLVERS;

PARALLEL PROCESSING SYSTEMS;

EID: 0031164850     PISSN: 01678191     EISSN: None     Source Type: Journal    
DOI: 10.1016/s0167-8191(97)00022-7     Document Type: Article

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