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Volumn 33, Issue 13, 1997, Pages 1139-1140

Suppression of boron penetration by using inductive-coupling-nitrogen-plasma in stacked amorphous/polysilicon gate structure

Author keywords

MOS integrated circuits; Plasma

Indexed keywords

ELECTRIC BREAKDOWN; GATES (TRANSISTOR); PLASMA APPLICATIONS; SEMICONDUCTING BORON; SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0031163713     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19970706     Document Type: Article
Times cited : (1)

References (6)
  • 1
    • 0022564008 scopus 로고
    • Submicrometer thin gate oxide p-channel transistor with p+-polysilicon gates for VLSI applications
    • CHAN, K.M., LIN, W.J., LAU, C.K., and FU, H.S.: 'Submicrometer thin gate oxide p-channel transistor with p+-polysilicon gates for VLSI applications', IEEE Electron Device Lett., 1986, 7, pp. 49-51
    • (1986) IEEE Electron Device Lett. , vol.7 , pp. 49-51
    • Chan, K.M.1    Lin, W.J.2    Lau, C.K.3    Fu, H.S.4
  • 6
    • 0027879329 scopus 로고
    • Suppression of born penetration into an ultrathin gate oxide (<7nm) by using a stacked-amorphous-silicon (SAS) film
    • WU, S.L., LEE, C.L., LEI, T.F., CHEN, J.F., and CHEN, L.J.: 'Suppression of born penetration into an ultrathin gate oxide (<7nm) by using a stacked-amorphous-silicon (SAS) film'. IEDM Tech. Dig., 1993, pp. 329-332
    • (1993) IEDM Tech. Dig. , pp. 329-332
    • Wu, S.L.1    Lee, C.L.2    Lei, T.F.3    Chen, J.F.4    Chen, L.J.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.