SCOPUS 정보 검색 플랫폼

IEEE Electron Device Letters

Volumn 18, Issue 6, 1997, Pages 261-263

A CMOS mismatch model and scaling effects

(3) Wong, Shyh Chyi a Pan, Kuo Hua b Ma, Dye Jyun c

a FENG CHIA UNIVERSITY (Taiwan)

b NATIONAL CHIAO TUNG UNIVERSITY (Taiwan)

c NATIONAL CHUNG HSING UNIVERSITY (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC CURRENTS; ELECTRIC RESISTANCE; MOS DEVICES; SEMICONDUCTOR DEVICE MODELS; STATISTICAL METHODS; SURFACE ROUGHNESS;

SCALING EFFECTS;

CMOS INTEGRATED CIRCUITS;

EID: 0031163318 PISSN: 07413106 EISSN: None Source Type: Journal
DOI: 10.1109/55.585349 Document Type: Article

Times cited : (41)

References (9)

1
- 0024754187
- Matching properties of MOS transistors
- M. J. M. Pelgrom, A. C. S. Duinmaijer, and A. P. G. Welbers, "Matching properties of MOS transistors," IEEE J. Solid-State Circuits, vol. 24, pp. 1433-1440, 1989.
- (1989) IEEE J. Solid-State Circuits , vol.24 , pp. 1433-1440
- Pelgrom, M.J.M.¹ Duinmaijer, A.C.S.² Welbers, A.P.G.³

2
- 0022891057
- Characterization and modeling of mismatch in MOS transistors for precision analog design
- K. R. Lakshmikumar, R. A. Hadaway, and M. A. Copeland, "Characterization and modeling of mismatch in MOS transistors for precision analog design," IEEE J. Solid-State Circuits, vol. SSC-21, pp. 1057-1066, 1986.
- (1986) IEEE J. Solid-State Circuits , vol.SSC-21 , pp. 1057-1066
- Lakshmikumar, K.R.¹ Hadaway, R.A.² Copeland, M.A.³

3
- 0026821212
- On the relationship between topography and transistor matching in a analog CMOS technology
- R. Gregor, "On the relationship between topography and transistor matching in a analog CMOS technology," IEEE Trans. Electron Devices, vol. 39, pp. 275-282, 1992.
- (1992) IEEE Trans. Electron Devices , vol.39 , pp. 275-282
- Gregor, R.¹

4
- 0029229608
- Mismatch characterization of small size MOS transistors
- J. Bastos et al., "Mismatch characterization of small size MOS transistors," in Proc. IEEE IEEE int. Conf. Microelectron. Test Structures, 1995, pp. 271-276.
- (1995) Proc. IEEE IEEE Int. Conf. Microelectron. Test Structures , pp. 271-276
- Bastos, J.¹

5
- 0029218628
- Characterization and modeling of MOS mismatch in analog CMOS technology
- S.-C. Wong, J.-K. Ting, and S.-L. Hsu, "Characterization and modeling of MOS mismatch in analog CMOS technology," in Proc. IEEE Int. Conf. Microelectron. Test Structures, 1995, 171-176.
- (1995) Proc. IEEE Int. Conf. Microelectron. Test Structures , pp. 171-176
- Wong, S.-C.¹ Ting, J.-K.² Hsu, S.-L.³

6
- 0021586347
- Random error effects in matched MOS capacitors and current sources
- J. B. Shyu, G. C. Temes, F. Krummenacher, "Random error effects in matched MOS capacitors and current sources," IEEE J. Solid-State Circuits, vol. SSC-19, pp. 948-955, 1984.
- (1984) IEEE J. Solid-State Circuits , vol.SSC-19 , pp. 948-955
- Shyu, J.B.¹ Temes, G.C.² Krummenacher, F.³

7
- 0003750001
- New York: McGraw-Hill
- Y. P. Tsividis, Operation and Modeling of the MOS Transistor. New York: McGraw-Hill, 1987.
- (1987) Operation and Modeling of the MOS Transistor
- Tsividis, Y.P.¹

8
- 0025415048
- Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas
- T. Sakurai and A. R. Newton, "Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas," IEEE J. Solid-State Circuits, vol. 25, pp. 584-594, 1990.
- (1990) IEEE J. Solid-State Circuits , vol.25 , pp. 584-594
- Sakurai, T.¹ Newton, A.R.²

9
- 3643131736
- Models and elements, MetaSoftware
- HSPICE Users' Guide, vol. 2, "Models and elements," MetaSoftware, 1995.
- (1995) HSPICE Users' Guide , vol.2

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.