Monolithic CMOS digital integrated circuits in 6H-SiC using an implanted p-well process

IEEE Electron Device Letters

Volumn 18, Issue 5, 1997, Pages 194-196

  Ryu, S ^a   Kornegay, K T ^a   Cooper Jr , J A ^a   Melloch, M R ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL INTEGRATED CIRCUITS; ELECTRIC INVERTERS; LOGIC CIRCUITS; MOSFET DEVICES; THERMODYNAMIC STABILITY;

IMPLANTED P WELL PROCESS;

CMOS INTEGRATED CIRCUITS;

EID: 0031146793     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.568759     Document Type: Article

References (6)

1. W. Xie, J. A. Cooper, Jr., and M. R. Melloch, "Monolithic NMOS digital integrated circuits in 6H-SiC," IEEE Electon Device Lett., vol. 15, pp. 455-457, Nov. 1994.
2. S. Ryu and K. T. Kornegay, "Design and fabrication of depletion load NMOS integrated circuits in 6H-SiC," in Inst. Phys. Conf., IOP Publishing Ltd., 1996, ser. no. 142, ch. 4, pp. 789-792.
3. D. B. Slater, Jr., G. M. Johnson, L. A. Lipkin, A. V. Suvorov, and J. W. Palmour, "Demonstration of a 6H-SiC CMOS technology," in Trans. 3rd Int. High-Temp. Electron. Conf., 1996, vol. 2, pp. XVI-27-XVI-32.
4. _, "Demonstration of a 6H-SiC CMOS technology," in 54th Annu. Dev. Res. Conf. Dig., June 24-26 1996, pp. 162-163.
5. S. Ahmed, C. J. Barbero, T. W. Sigmon, and J. W. Erickson, "Empirical depth profile simulator for ion implantation in 6H α-SiC," J. Appl. Phys., vol. 77, no. 12, pp. 6194-6220, June 1995.
6. J. N. Shenoy, M. Melloch, and J. A. Cooper, Jr., "High-voltage double-implanted power MOSFET's in 6H-SiC," in 54th Annu. Dev. Res. Conf., Late News, June 24-26 1996.