An improved high frequency C-V method for interface state analysis on MIS structures

Solid-State Electronics

Volumn 41, Issue 4, 1997, Pages 635-641

  Koukab, A ^a   Bath, A ^a   Losson, E ^a  

^a UNIVERSITÉ DE LORRAINE   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE MEASUREMENT; DEEP LEVEL TRANSIENT SPECTROSCOPY; DIELECTRIC MATERIALS; SEMICONDUCTING INDIUM PHOSPHIDE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING; VOLTAGE MEASUREMENT;

CAPACITANCE VOLTAGE CHARACTERISTICS; INTERFACE STATE ANALYSIS; MODIFIED BIAS TEMPERATURE STRESS (BTS);

MIS DEVICES;

EID: 0031126167     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(96)00112-8     Document Type: Article

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