Realistic parallel performance estimation

Parallel Computing

Volumn 23, Issue 1-2, 1997, Pages 5-21

  Hey, Tony ^a   Dunlop, Alistair ^a   Hernández, Emilio ^a  

^a UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

Author keywords

Benchmarks; Communication; Memory hierarchy; Message passing; Performance tools

Indexed keywords

BUFFER STORAGE; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; COSTS; DATA COMMUNICATION SYSTEMS; HIERARCHICAL SYSTEMS; PARAMETER ESTIMATION; PERFORMANCE; PROGRAM PROCESSORS; STORAGE ALLOCATION (COMPUTER);

MEMORY HIERARCHY; SOFTWARE PACKAGE PERFORM;

PARALLEL PROCESSING SYSTEMS;

EID: 0031125157     PISSN: 01678191     EISSN: None     Source Type: Journal    
DOI: 10.1016/s0167-8191(96)00093-2     Document Type: Article

References (33)

1. G.C. Fox, M.A. Johnson G.A. Syzenga, S.W. Otto, J.X. Salmon and D.W. Walker, Solving Problems on Concurrent Processors - General Techniques and Regular Problems, Vol. 1. (Prentice hall, Englewood Cliffs, NJ, 1988).
2. C.A. Addison, V.S. Getov, A.J.G. Hey, R.W. Hockney and I.C. Wolton, The genesis distributed-memory benchmarks, in: J. Dongarra and W. Gentzsch eds., Computer Benchmarks (North-Holland, 1993) 257-271.
3. J. Dongarra and T. Hey, The PARKBENCH Benchmark Collection, Supercomputer 11(2-3) (1995) 94-114.
4. K. Hockney, Performance parameters and benchmarking of supercomputers, Parallel Comput. 17(10-1) (1991) 1111-1130.
5. R. Hockney, Computational similarity, Concurrency Pract. Exp. 7(2) (1995) 147-166.
6. V. Getov, 1-Dimensional Parallel FFT Benchmark on SUPRENUM, Lecture Notes Comput. Sci. 605 (1992) 163-174.
7. V. Balasundaram, G. Pox, K. Kennedy and U. Kremer, A Static Performance Estimator to Guide Data Partitioning Decisions, ACM Sigplan Notices 26(7) (1991) 213-223.
8. N. MacDonald, Predicting the Execution time of Sequential Scientific Codes, in: Proc. international Workshop on Automatic Distributed Memory Parallelisation. Automatic Data Distribution and Automatic Parallel Performance Prediction, Saarbrucken, Germany, March (1993).
9. K. Kennedy, N. McIntosh and K.S. McKinley, Static Performance Estimation in a Parallelising Compiler, Technical report. Department of Computer Science, Rice University (1992).
10. Y. Seo, T. Kamachi, Y. Watanabe, K. Kusano, K. Suehiro and Y. Shiroto, Static Performance Prediction in PCASE: A Programming Environment for Parallel Supercomputers, Technical report, NEC Corporation, December (1993).
11. A. Dunlop, A. Hey and D. Nicole, An Evaluation of the Statement Counting Method for Performance Prediction (1996), in preparation.
12. 3T to Guide the Parallelisation and Optimisation Effort under the Vienna Fortran Compilation System, in: IEEE Proceedings of the Scalable high Performance Computing Conference, Knoxville, TN, May (1994).
13. P. Banerjee, J. Chandy, M. Gupta, E. Hodges, J. Holm, A. Lain, D. Palermo, S. Ramaswamy and E. Su, The Paradigm Compiler for Distributed-Memory MultiComputers, IEEE Comput. 28(10) October (1995) 37-47.
14. A.N. Dunlop and D.J. Pritchard, Parallel Performance Estimator, Technical Report D5.3b, ESPRIT project P6643, Portable Parallel Programming Environment (PPPE) (1995).
15. E.E. Hernández, Parallel Computing System Evaluation using Automatically Synthesized Benchmarks, April (1995), internal Report.
16. E. Brewer, A. Colbrook, C. Dellarocas and W. Weihl, PROTEUS: A High-Performance Parallel-Architecture Simulator, Performance Eval. Rev. 20(1) (1992).
17. M. Weiser, Program slicing, IEEE Trans. Software Eng. 10(4) (1984).
18. A.N. Dunlop, V. Marion-Poty and D.J. Pritchard, Benchmark Analysis using a Performance Estimator, Technical report, Department of Electronics and Computer Science, University of Southampton, July (1995).
19. D. Bailey, E. Barszcz, J. Barton, D. Browning, R. Carter, L. Dagum, S. Fatoohi, S. Fineberg, P. Frederickson, T. Lasinski, R. Schreiber, H. Simon, V. Venkatakrishnan and S. Weeratunga, The NASA Parallel Benchmarks, Technical Report RNR-94-007, NASA Ames Research Center, USA, March (1994).
20. C. Figueira and E. Hernández, Benchmarks Specification and Generation for Performance Estimation on MIMD Machines, IFIP Trans. Comput. Sci. Technol. 44 (1994) 215-223.
21. A. Dunlop, E. Hernandez, O. Naim, A. Hey and D. Nicole, A toolkit for optimizing parallel performance, Lecture Notes Comput. Sci. 919 (1995) 548-553.
22. H.C. Cragon, Memory Systems and Pipelined Processors (Jones and Bartlett, 1995).
23. J. Hennessy and D. Patterson, Computer Architecture, a Quantitative Approach, 2nd. Ed. (Morgan Kaufman Publishers, inc., 1995).
24. A. Singh and Z. Segall, Synthetic Workload Generation for Experimenting with Multiprocessors, in: Proc. of the 3rd Int. Conf. on Distributed Computing Systems (IEEE Computer Society Press, 1982) 778-785.
25. R. Candlin, P. Fisk, J. Phillips and N. Skilling, Studying the Performance of Concurrent Programs by Simulation Experiments on Synthetic Programs, ACM Performance Eval. Rev. 20 (1992) 239-240.
26. A. Nanda and L.M. Ni, Benchmark workload generation and performance characterization of multiprocessors, in: Proc. of the Conf. on Supercomputing (IEEE Computer Society Press, November 1992) 20-31.
27. S. Waser, The Parstone Benchmark, Supercomputer 20(4-5) (1993) 46-57.
28. P. Mehra, M. Gower and M.A. Bass, Automated Modelling of Message-Passing Programs, in: IEEE Proc. ISBN 0-8186-5292-6 (1994).
29. W. Gilot, The SUPRENUM supercomputer - Goals, achievements, and lessons learned, Parallel Comput. 20(10-11) 1407-1425 (1994).
30. CRAY T3D System Architecture Overview Manual (1995).
31. J.R.B. Davies, Issues in compiler performance, in: J.L. Martin, ed., Performance Evaluation of Supercomputers (North-Holland, 1988) 51-68.
32. R. Hockney, The Communication Challenge for MPP: Intel Paragon and Meiko CS-2, Parallel Comput. 20(3) (1994) 389-398.
33. Z.W. Xu and K. Hwang, Modelling Communication Overhead - MPI and MPL Performance on the IBM SP2, IEEE Parallel Distrib. Technol. 4(1) (1996) 9-23.