Low contact resistance metallization for gigabit scale DRAM's using fully-dry cleaning by Ar/H2 ECR plasma

IEEE Transactions on Electron Devices

Volumn 44, Issue 4, 1997, Pages 588-594

  Taguwa, Tetsuya ^b   Urabe, Koji ^b   Sekine, Makoto ^b   Yamada, Yoshiaki ^b   Kikkawa, Takamaro ^a,b  

^a IEEE

^b NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ARGON; ASPECT RATIO; CHEMICAL POLISHING; CHEMICAL VAPOR DEPOSITION; DIFFUSION; ELECTRIC RESISTANCE; ELECTRON CYCLOTRON RESONANCE; HYDROGEN; SEMICONDUCTOR PLASMAS; SILICON WAFERS; TITANIUM NITRIDE; ULSI CIRCUITS;

BOROPHOSPHOSILICATE GLASS; CHEMICAL MECHANICAL POLISHING; FULLY DRY CLEANING TECHNIQUE;

RANDOM ACCESS STORAGE;

EID: 0031125004     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.563363     Document Type: Article

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