Multi-Terminal Binary Decision Diagrams: An Efficient Data Structure for Matrix Representation

Formal Methods in System Design

Volumn 10, Issue 2-3, 1997, Pages 149-169

  Fujita, M ^a   Mcgeer, P C ^b   Yang, J C Y ^c,d  

^a FUJITSU LABORATORIES OF AMERICA   (United States)

^b CADENCE DESIGN SYSTEMS   (United States)

^c STANFORD UNIVERSITY   (United States)

^d YAHOO INC   (United States)

Author keywords

Binary Decision Diagrams; Matrix Algorithms; Multi Terminal BDD's; Spectral Methods; Walsh Transform

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; MATRIX ALGEBRA; WALSH TRANSFORMS;

MATRIX REPRESENTATION; MULTITERMINAL BINARY DECISION DIAGRAMS;

DATA STRUCTURES;

EID: 0031120522     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1023/a:1008647823331     Document Type: Article

References (14)

1. A. Aho, J. Hopcroft, and J. Ullman, The Design and Analysis of Computer Algorithms, Addision-Wesley, 1974.
2. S.B. Akers, "On a theory of boolean functions," J. SIAM, 1959.
3. R.E. Bryant, "Graph-based algorithms for boolean function manipulation," IEEE Transactions on Computers, 1986.
4. E.M. Clarke, M. Fujita, K. McMillan, J. Yang, and X. Zhao, "Spectral transforms for large boolean functions with applications to technology mapping," in Design Automation Conference, 1993.
5. E.M. Clarke, M. Fujita, K. McMillan, J. Yang, and X. Zhao, "Spectral transforms for large boolean functions with applications to technology mapping," This Issue, 1996.
6. O. Coudert and J.C. Madre, "A unified framework for the formal verification of sequential circuits," in IEEE International Conference on Computer-Aided Design, 1990.
7. O. Coudert and J.-C. Madre, "A new implicit graph-based prime and essential prime computation technique," in New Trends in Logic Synthesis and Optimization, T. Sasao (Ed.), Kluwer Academic Publishers, 1992.
8. O. Coudert, J.C. Madre, and H. Fraisse, "A new viewpoint on two-level minimization," in Design Automation Conference, 1993.
9. S. Malik, A. Wang, R.K. Brayton, and A.L. Sangiovanni-Vincentelli, "Logic verification using binary decision diagrams in a logic synthesis environment," in IEEE International Conference on Computer-Aided Design, 1988.
10. Y. Matsunaga, P.C. McGeer, and R.K. Brayton, "On computing the transitive closure of a state transition relation," in Design Automation Conference, 1993.
11. Tsutomu Sasao, "Ternary decision diagrams and their applications," in International Workshop on Logic Synthesis, 1993.
12. V. Strassen, "Gaussian elimination is not optimal," Numer. Math, 13, 1969.
13. G.M. Swamy, R.K. Brayton, and P.C. McGeer, "A fully implicit quine-mccluskey procedure using bdds," Technical Report UCB/ERL M92/127, Electronics Research Lab, University of California at Berkeley, 1992.
14. H. Touati, H. Savoj, B. Lin, R.K. Brayton, and A. Sangiovanni-Vincentelli, "Implicit state enumeration of finite state machines using bdd's," in IEEE International Conference on Computer-Aided Design, 1990.