Margins and yield in superconducting circuits with gain

IEEE Transactions on Applied Superconductivity

Volumn 7, Issue 1, 1997, Pages 18-22

  Terzioglu, Esin ^a   Beasley, Malcolm R ^a,b  

^a STANFORD UNIVERSITY   (United States)

^b IEEE

Author keywords

Circuit analysis; Flip flops; Inverters; Josephson logic; Superconducting transistors

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC INVERTERS; ELECTRIC NETWORK ANALYSIS; FLIP FLOP CIRCUITS; GAIN CONTROL;

VORTEX FLOW TRANSISTOR (VFT) CIRCUITS;

JOSEPHSON JUNCTION DEVICES;

EID: 0031101406     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/77.585883     Document Type: Article

References (7)

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