Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 15, Issue 3, 1997, Pages 207-220

  Sriram, S ^a,b,c,d   Lee, Edward A ^{a,d,e,f,g,h,i}  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b DSP R and D Ctr at Taxas Instrum   (Spain)

^c INDIAN INSTITUTE OF TECHNOLOGY KANPUR   (India)

^d UNIVERSITY OF CALIFORNIA   (United States)

^e YALE UNIVERSITY   (United States)

^f Yale University ^*  (Russian Federation)

^g LUCENT TECHNOLOGIES   (United States)

^h Adv Data Communications Laboratory   (United States)

ⁱ Berkeley Design Technology Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL SIGNAL PROCESSING; GRAPH THEORY; IMAGE PROCESSING; ITERATIVE METHODS; REAL TIME SYSTEMS; RECURSIVE FUNCTIONS; RESOURCE ALLOCATION; SCHEDULING; SYNCHRONIZATION;

STATICALLY SCHEDULED MULTIPROCESSORS; SYNCHRONOUS DATA FLOW (SDF) GRAPHS;

MULTIPROCESSING SYSTEMS;

EID: 0031099618     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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