Verification techniques for cache coherence protocols

ACM Computing Surveys

Volumn 29, Issue 1, 1997, Pages 82-126

  Pong, Fong ^a   Dubois, Michel ^b  

^a SUN MICROSYSTEMS   (United States)

^b UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

B.3.2 Memory Structures : Design Styles shared memory; B.3.3 Memory Structures : Performance Analysis and Design Aids formal models; B.4.4 Input Output and Data Communications : Performance Analysis and Design Aids formal models; Verification

Indexed keywords

BUFFER STORAGE; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; MULTIPROCESSING SYSTEMS; PROBLEM SOLVING; STATE SPACE METHODS;

CACHE COHERENCE; FINITE STATE MACHINE; PROTOCOL VERIFICATION; SHARED MEMORY MULTIPROCESSORS; STATE EXPANSION; STATE REPRESENTATION;

NETWORK PROTOCOLS;

EID: 0031084017     PISSN: 03600300     EISSN: None     Source Type: Journal    
DOI: 10.1145/248621.248624     Document Type: Article

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