Advances in shared-memory designs for gigabit ATM switching

Bell Labs Technical Journal

Volumn 2, Issue 2, 1997, Pages 175-187

  Eng, Kai Y ^a   Pashan, Mark A ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS TRANSFER MODE; DATA STORAGE EQUIPMENT; PACKET SWITCHING; QUEUEING THEORY; TELECOMMUNICATION TRAFFIC;

PER VIRTUAL CHANNEL (VC) QUEUING; SHARED MEMORY; TRAFFIC POLICING; TRAFFIC SHAPING;

SWITCHING SYSTEMS;

EID: 0031083837     PISSN: 10897089     EISSN: None     Source Type: Journal    
DOI: 10.1002/bltj.2054     Document Type: Article

References (16)

1. C. Clos, "A Study of Non-Blocking Switching Network," Bell System Technical Journal, Vol. 32, No. 3, Mar. 1953, pp. 406-424.
2. V. E. Benes, "Optimal Rearrangeable Multistage Connecting Networks," Bell System Technical Journal Vol. 43, No. 7, July 1964, pp. 1641-1656.
3. D. M. Dias and J. R. Jump, "Analysis and Simulation of Buffered Delta Networks," IEEE Trans. Computers, Vol. C-30, No. 4, Apr. 1981, pp. 273-282.
4. J. S. Turner and L. F. Wyatt, "A Packet Network Architecture for Integrated Services," Globecom '83 Conference Record, Nov. 1983, pp. 45-50.
5. C. P. Kruskal and M. Snir, "The Performance of Multistage Interconnection Networks for Multiprocessors," IEEE. Trans. Computers, Vol. C-32, No. 12, Dec. 1983, pp.1091-1098.
6. D. M. Dias and M. Kumar, "Packet Switching in NIogN Multistage Networks," Globecom '84 Conf. Rec., Nov. 1984, pp. 114-120.
7. G. Richards, "Theoretical Aspects of Multi-stage Networks for Broadband Networks," IEEE INFOCOM '93 Tutorial, Mar. 1993.
8. H. Amadi, W. E. Denzel, C. A. Murphy, and E. Port, "A High-Performance Switch Fabric for Integrated Circuit and Packet Switching," IEEE INFOCOM '88, Mar. 1988, pp. 9-18.
9. P. Gonet, J. P. Coudreuse, and M. Servel, "Implementing Asynchronous Transfer Mode Concepts: Main Results of the Prelude Experiment," Globecom '87 Conf. Record, Nov. 1987, pp. 1871-1875.
10. M. Karol and K. Y. Eng, "Performance of Hierarchical Multiplexing in ATM Switch Designs," ICC '92 Conf. Rec., June 1992, pp. 269-275.
11. M. J. Karol, M. G. Hluchyj, and S. P. Morgan, "Input versus Output Queueing on a Space-Division Packet Switch," IEEE. Trans. Comm., Vol. COM-35, No. 12, Dec. 1987, pp. 1347-1356.
12. T-C. Hou and D. M. Lucantoni, "Buffer Sizing for Synchronous Self-Routing Broadband Packet Switches with Bursty Traffic," International Journal of Digital & Analog Cabled Systems, Vol. 2, No. 4, Oct.-Dec. 1989, pp. 253-260.
13. K. Y. Eng, M. A. Pashan, R. A. Spanke, M. J. Karol, G. D. Martin, H. Obara, and H. Ueda, "A Prototype Growable 2.5 Gb/s ATM Switch for Broadband Applications," Journal of High Speed Networks, Vol. 1, No. 3, 1992, pp. 237-253.
14. K. Y. Eng and M. J. Karol, "State of the Art in Gigabit ATM Switching," IEEE BSS '95, Poznan, Poland, April 19-21, 1995.
15. K. Y. Eng, M. J. Karol, G. J. Cyr, and M. A. Pashan, "Design and Prototype of a Terabit ATM Switch Using a Concentrator-Based Growable Switch Architecture," ISS '95 Conf. Rec., Apr. 1995, pp. 404-408.
16. K. Y. Eng, M. J. Karol, and Y. S. Yeh, "A Growable Packet (ATM) Switch Architecture: Design Principles and Applications," IEEE. Trans. Comm., Vol. 40, No. 2, Feb. 1992, pp. 423-430.