Efficient digital filtering architectures using pipelining/interleaving

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 44, Issue 2, 1997, Pages 110-119

  Jiang, Zhongnong ^b,c   Willson Jr , Alan N ^a,d  

^a IEEE   (United States)

^b University of California   (United States)

^c TEXAS INSTRUMENTS   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Digital filter; Multirate signal processing; Pipelined computation

Indexed keywords

ADDERS; COMPUTER HARDWARE; INTEGRATED CIRCUITS; PIPELINE PROCESSING SYSTEMS; SIGNAL FILTERING AND PREDICTION; SIGNAL PROCESSING; TRANSFER FUNCTIONS;

MULTIRATE SIGNAL PROCESSING SYSTEMS; PIPELINING INTERLEAVING TECHNIQUE;

DIGITAL FILTERS;

EID: 0031078934     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.554438     Document Type: Article

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