Control of n-type dopant transitions in low-temperature silicon epitaxy

Journal of the Electrochemical Society

Volumn 144, Issue 2, 1997, Pages 674-678

  Kamins, T I ^a,b   Lefforge, D ^a  

^a HEWLETT PACKARD LABORATORIES   (United States)

^b ELECTROCHEMICAL SOCIETY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARSENIC; DEPOSITION; DIFFUSION; EPITAXIAL GROWTH; HETEROJUNCTION BIPOLAR TRANSISTORS; LOW TEMPERATURE OPERATIONS; PHOSPHORUS; SEMICONDUCTING SILICON;

DOPANT TRANSITION; LOW TEMPERATURE EPITAXY;

SEMICONDUCTOR DOPING;

EID: 0031078159     PISSN: 00134651     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.1837466     Document Type: Article

References (17)

1. C. A. King, J. L. Hoyt, C. M. Gronet, J. F. Gibbons, M. P. Scott, and J. Turner, IEEE Electron Device Lett., EDL-10, 52 (1989).
2. S. P. Voinigescu, C. A. T. Salama, J.-P. Noel, and T. I. Kamins, Paper 15.1, pp. 369-372, in Technical Digest of 1994 International Electron Devices Meeting, San Francisco, CA, Dec. 11-14, 1994.
3. T. I. Kamins, Abstract 1237, p. 1776, The Electrochemical Society Meeting Abstracts Vol. 93-1, Honolulu, HI, May 16-21, 1993; Chemical Vapor Deposition 1993-CVD-XII, K. F. Jensen and G. W. Cullen, Editors, PV 93-2, pp. 117-126, The Electrochemical Society Proceedings Series, Pennington, NJ (1993).
4. T. I. Kamins, Abstract 1237, p. 1776, The Electrochemical Society Meeting Abstracts Vol. 93-1, Honolulu, HI, May 16-21, 1993; Chemical Vapor Deposition 1993-CVD-XII, K. F. Jensen and G. W. Cullen, Editors, PV 93-2, pp. 117-126, The Electrochemical Society Proceedings Series, Pennington, NJ (1993).
5. R. Reif, This Journal, 129, 1122 (1982); R. Reif and M. Vanzi, ibid., 128, 2187 (1981).
6. R. Reif, This Journal, 129, 1122 (1982); R. Reif and M. Vanzi, ibid., 128, 2187 (1981).
7. T. O. Sedgwick, P. D. Agnello, D. Nguyen Ngoc., T. S. Kuan, and G. Scilla, Appl. Phys. Lett., 58, 1896 (1991).
8. P. D. Agnello, T. O. Sedgwick, M. S. Goorsky, and J. Cotte, ibid., 60, 454 (1992).
9. S.-M. Jang, K. Liao, and R. Reif, ibid., 63, 1675 (1993).
10. C. Tsai, S. M. Jang, J. A. Tsai, and R. Reif, J. Appl. Phys., 69, 8158 (1991).
11. McD. Robinson and L. H. Lawrence, in Semiconductor Fabrication: Technology and Metrology, 5th International Symposium on Semiconductor Processing, D. C. Gupta, Editor, ASTM STP 990, American Society for Testing and Materials, Philadelphia, PA (1988).
12. F. C. Eversteyn and B. H. Put, This Journal, 120, 106 (1973); A. C. Adams, in VLSI Technology, S. M. Sze, Editor, p. 93, McGraw-Hill, New York (1983).
13. F. C. Eversteyn and B. H. Put, This Journal, 120, 106 (1973); A. C. Adams, in VLSI Technology, S. M. Sze, Editor, p. 93, McGraw-Hill, New York (1983).
14. T.-K. Yu, S.-K. Park, J. Fitch, and M. Orlowski, Paper 34.2, p. 879, in Technical Digest of International Electron Device Meeting, Washington, DC, Dec. 1991.
15. C. R. Helms, Stanford University, Stanford, CA, Private communication.
16. J. J. Burton and E. S. Machlin, Phys. Rev. Lett., 37, 1433 (1976).
17. M. M. Mandurah, K. C. Saraswat, C. R. Helms, and T. I. Kamins, J. Appl. Phys., 51, 5755 (1980).