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Volumn 40, Issue , 1997, Pages 334-335
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Digitally-controlled PLL with pulse width detection mechanism for error correction
a
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Author keywords
[No Author keywords available]
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Indexed keywords
CAPACITORS;
DIGITAL CONTROL SYSTEMS;
ERROR CORRECTION;
INTERFERENCE SUPPRESSION;
PHASE CONTROL;
PHASE LOCKED LOOPS;
PULSE WIDTH MODULATION;
SPURIOUS SIGNAL NOISE;
VARIABLE FREQUENCY OSCILLATORS;
PHASE FREQUENCY DETECTOR (PFD);
PULSE WIDTH DETECTION (PWD);
CMOS INTEGRATED CIRCUITS;
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EID: 0031073616
PISSN: 01936530
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
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Times cited : (3)
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References (4)
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