2 V 250 MHz multimedia processor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 40, Issue , 1997, Pages 266-267

  Yoshida, Toyohiko ^a   Shimazu, Yukihiko ^a   Yamada, Akira ^a   Holmann, Edgar ^a   Nakakimura, Kiyoshi ^a   Takata, Hidehiro ^a   Kitao, Masaya ^a   Kishi, Toshio ^a   Kobayashi, Hiroyuki ^a   Sato, Masayuki ^a   Mohri, Atsushi ^a   Suzuki, Kazumasa ^a   Ajioka, Yoshihide ^a   Higashitani, Keiichi ^a  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DECODING; DIGITAL SIGNAL PROCESSING; FREQUENCY MULTIPLYING CIRCUITS; IMAGE CODING; MAGNETIC DISK STORAGE; MICROPROCESSOR CHIPS; RANDOM ACCESS STORAGE; REDUCED INSTRUCTION SET COMPUTING; TIMING CIRCUITS;

ARCHITECTURE PROGRAMMABILITY; DIRECT MEMORY ACCESS (DMA) CONTROLLERS; MULTIMEDIA PROCESSORS;

PIPELINE PROCESSING SYSTEMS;

EID: 0031073174     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)