3.3 V 16 Mb non-volatile virtual DRAM using a NAND flash memory technology

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 40, Issue , 1997, Pages 398-399

  Jung, Tae Sung ^a   Choi, Do Chan ^a   Cho, Sung Hee ^a   Kim, Myong Jae ^a   Lee, Seung Keun ^a   Choi, Byung Soon ^a   Yum, Jin Sun ^a   Kim, San Hong ^a   Lee, Dong Gi ^a   Son, Jong Chang ^a   Yong, Myung Sik ^a   Oh, Heung Kwun ^a   Jun, Sung Bu ^a   Lee, Woung Moo ^a   Haq, Ejaz Haq, ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER CIRCUITS; COMPUTER ARCHITECTURE; FLIP FLOP CIRCUITS; INPUT OUTPUT PROGRAMS; NAND CIRCUITS; RANDOM ACCESS STORAGE; TRANSISTORS; VIRTUAL STORAGE;

HIERARCHICALLY SEPARATED ROW DECODER (HSRD); NONVOLATILE VIRTUAL DYNAMIC RANDOM ACCESS MEMORY (NVDRAM); ROW ADDRESS STROBE (RAS);

NONVOLATILE STORAGE;

EID: 0031072545     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)