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Volumn 33, Issue 5, 1997, Pages 382-383

Random double-bit error correcting generalised array codes

Author keywords

Arrays; Codes; Information theory

Indexed keywords

BINARY CODES; CALCULATIONS; CODING ERRORS; COMBINATORIAL CIRCUITS; DECODING; ENCODING (SYMBOLS); INFORMATION THEORY;

EID: 0031069989     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19970252     Document Type: Article
Times cited : (3)

References (8)
  • 2
    • 0027565774 scopus 로고
    • Generalised array codes and their trellis structure
    • HONARY, B., MARKARIAN, U., and FARRELL, P.: 'Generalised array codes and their trellis structure', Electron. Lett., 1993, 29, (6), pp. 541-542
    • (1993) Electron. Lett. , vol.29 , Issue.6 , pp. 541-542
    • Honary, B.1    Markarian, U.2    Farrell, P.3
  • 4
    • 3242849830 scopus 로고
    • Encoding of generalized concatenated codes
    • BLOCH, E.L., and ZYABLOV, V.V.: 'Encoding of generalized concatenated codes', Probl. Inf. Transm., 1974, 10, (3), pp. 40-49
    • (1974) Probl. Inf. Transm. , vol.10 , Issue.3 , pp. 40-49
    • Bloch, E.L.1    Zyablov, V.V.2
  • 5
    • 0016975277 scopus 로고
    • New classes of binary codes constructed on the basis of concatenated codes and product codes
    • KASAHARA, M., SUGIYAMA, Y., HIRASAWA, S., and NAMEKAWA, T.: 'New classes of binary codes constructed on the basis of concatenated codes and product codes', IEEE Trans., 1976, IT-22, pp. 462-468
    • (1976) IEEE Trans. , vol.IT-22 , pp. 462-468
    • Kasahara, M.1    Sugiyama, Y.2    Hirasawa, S.3    Namekawa, T.4
  • 6
    • 0019539627 scopus 로고
    • Linear unequal error protection codes
    • BOYARINOV, I.M., and KATSMAN, G.L.: 'Linear unequal error protection codes', IEEE Trans., 1981, IT-27, pp. 168-175
    • (1981) IEEE Trans. , vol.IT-27 , pp. 168-175
    • Boyarinov, I.M.1    Katsman, G.L.2
  • 7
    • 0012331261 scopus 로고
    • A construction method for double-error correcting codes for application to main memories
    • in Japanese
    • IMAI, H., and KAMIYANAGI, Y.: 'A construction method for double-error correcting codes for application to main memories', Trans. IECE Japan, 1977, J60-D, pp. 861-868 (in Japanese)
    • (1977) Trans. IECE Japan , vol.J60-D , pp. 861-868
    • Imai, H.1    Kamiyanagi, Y.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.