Formal verification of combinational circuits

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1997, Pages 218-225

  Jain, J ^a   Narayan, A ^a   Fujita, M ^a   Sangiovanni Vincentelli, A ^a  

^a FUJITSU LABORATORIES OF AMERICA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; DESIGN; DIGITAL CIRCUITS; VLSI CIRCUITS;

FORMAL VERIFICATION;

COMBINATORIAL CIRCUITS;

EID: 0030862264     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (52)