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Volumn , Issue , 1997, Pages 540-541
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Novel hierarchical test generation method for processors
a a |
Author keywords
[No Author keywords available]
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Indexed keywords
CONTROL;
DESIGN;
TESTING;
VLSI CIRCUITS;
HIERARCHICAL TEST GENERATION;
PROGRAM PROCESSORS;
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EID: 0030857738
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (6)
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References (1)
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