The Trench Insulated Gate Bipolar Transistor - A high power switching device

Microelectronics Journal

Volumn 28, Issue 1, 1997, Pages 1-12

  Udrea, Florin ^a   Amaratunga, Gehan ^b  

^a UNIVERSITY OF CAMBRIDGE   (United Kingdom)

^b UNIVERSITY OF LIVERPOOL   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; MOSFET DEVICES; SWITCHING CIRCUITS;

ACCUMULATION LAYER INJECTION; TRANSVERSAL ELECTRIC FIELD MODULATION; TRENCH INSULATED GATE BIPOLAR TRANSISTOR (TIGBT);

BIPOLAR TRANSISTORS;

EID: 0030833112     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/s0026-2692(96)00058-4     Document Type: Article

References (13)

1. D. Ueda et al., A new injection suppression structure for conductivity modulated power MOSFETs, in Proc. 18th Int. Conf. on Solid State Device and Materials, Vol. 31, pp. 97, 1986.
2. H.-R. Chang and B.J. Baliga, 500-V n-channel Insulated-Gate Bipolar Transistor with a trench gate structure, IEEE Trans. Electron Device, ED-36 (1989) 1824.
3. M. Otsuki, S. Momota, A. Nishiura and K. Sakurai, The 3rd Generation IGBT toward a limitation of IGBT Performance, in Proc. 5th Int. Symp. on Power Semiconductor Devices and ICs, p. 24, May 1993.
4. M. Harada, T. Minato, M. Takahashi, H. Nishihara, K. Inoue and I. Takata, 600V Trench IGBT in comparison with planar IGBT, in Proc. 6th Int. Symp. on Power Semiconductor Devices and ICs, p. 411, May 1994.
5. F. Udrea, G.A.J. Amaratunga and Q. Huang, The effect of the hole current on the channel inversion in Trench Insulated Gate Bipolar Transistors, Solid State Electronics, 37 (1994) 507.
6. F. Udrea and G.A.J. Amaratunga, Theoretical comparison between trench and DMOS technologies for Insulated Gate Bipolar Transistors, IEEE Trans. Electron Device, 42 (1995) 1356.
7. F. Udrea and G.A.J. Amaratunga, A unified analytical model for the carrier dynamics in Trench Insulated Gate Bipolar Transistors, in Proc. 7th Int. Symp. on Power Semiconductor Devices and ICs, p. 190, May 1995.
8. M. Kitagawa, I. Omura, S. Hasegawa, T. Inoue and A. Nakagawa, A 4500 V Injection Enhanced Insulated Gate Bipolar Transistor (IEGT) operating in a mode similar to a thyristor, IEDM Tech. Dig. (1993) 679.
9. F. Udrea and G.A.J. Amaratunga, The Inversion Layer Emitter Thyristor - a novel power device concept, in Proc. 6th Int. Symp. on Power Semiconductor Devices and ICs, p. 190, May 1994.
10. A. Sabnis and J.T. Clemens, Characterisation of electron mobility in the inverted <100> Si surfaces, IEDM Tech. Dig. (1979) 18.
11. K. Matsushita, I. Omura and T. Ogura, Blocking voltage design consideration for deep Trench MOS gate high power devices, in Proc. 7th Int. Symp. on Power Semiconductor Devices and ICs, p. 256, May 1995.
12. T. Syau and B.J. Baliga, Mobility study on RIE etched silicon surfaces using SF6/O2 gas etchants, IEEE Trans. Electron Device, ED-40 (1993) 1997.
13. F. Udrea, Novel MOS-gated bipolar device concepts towards a new generation of power semiconductor devices, Ph.D. thesis, Cambridge University, 1995.