Area-delay tradeoff in distributed arithmetic based implementation of FIR filters

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1997, Pages 124-129

  Mehendale, M ^a   Sherlekar, S D ^a   Venkatesh, G ^a  

^a TEXAS INSTRUMENTS   (India)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; DESIGN; DIGITAL ARITHMETIC; VLSI CIRCUITS;

AREA-DELAY CURVES; MULTIRATE ARCHITECTURE;

DIGITAL FILTERS;

EID: 0030819657     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)