Micropipeline architecture for multiplier-less FIR filters

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1997, Pages 451-456

  Nooshabadi, S ^a   Montiel Nelson, J A ^a   Visweswaran, G S ^a   Nagchoudhurhi, D ^a  

^a Sch of Electrical Engineering   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

MICROPIPELINE ARCHITECTURE;

ALGORITHMS; DESIGN; DIGITAL SIGNAL PROCESSING; PIPELINE PROCESSING SYSTEMS; VLSI CIRCUITS;

ELECTRIC FILTERS;

EID: 0030819335     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)