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Volumn 21, Issue 4, 1997, Pages 417-429

Verification of a logically controlled, solids transport system using symbolic model checking

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); FAILURE ANALYSIS; LADDER NETWORKS; MATERIALS HANDLING; MATHEMATICAL MODELS; PROCESS ENGINEERING; SOLIDS;

EID: 0030736966     PISSN: 00981354     EISSN: None     Source Type: Journal    
DOI: 10.1016/0098-1354(95)00265-0     Document Type: Article
Times cited : (22)

References (19)
  • 1
    • 0022769976 scopus 로고
    • Graph-based algorithms for boolean function manipulation
    • R.E. Bryant, Graph-based algorithms for boolean function manipulation, IEEE Transactions on Computers, c-35, (1986) 677-691
    • (1986) IEEE Transactions on Computers , vol.C-35 , pp. 677-691
    • Bryant, R.E.1
  • 9
    • 0041750007 scopus 로고
    • Tools for the design of fault-tolerant controllers
    • San Francisco, CA, November
    • Gazi, E. A., W. D. Seider, and L. H. Ungar. Tools for the design of fault-tolerant controllers. Presented at the 1994 AIChE Annual Meeting, San Francisco, CA, November (1994).
    • (1994) 1994 AIChE Annual Meeting
    • Gazi, E.A.1    Seider, W.D.2    Ungar, L.H.3
  • 11
    • 0041750004 scopus 로고
    • Formal hardware verification methods: A survey
    • School of Computer Science, Carnegie Mellon University, Pittsburgh, PA, October
    • Gupta, A. Formal hardware verification methods: A survey. Computer Science Technical Report CMU-CS-91-193, School of Computer Science, Carnegie Mellon University, Pittsburgh, PA, October (1991).
    • (1991) Computer Science Technical Report CMU-CS-91-193
    • Gupta, A.1
  • 12
    • 0028378098 scopus 로고
    • The composition and validation of heterogeneous control laws
    • B. Kuipers and K. Åström, The composition and validation of heterogeneous control laws, Automatica, 30, (1994) 233-249
    • (1994) Automatica , vol.30 , pp. 233-249
    • Kuipers, B.1    Åström, K.2
  • 16
    • 0028417248 scopus 로고
    • Modeling programmable logic controllers for logic verification
    • I. Moon, Modeling programmable logic controllers for logic verification, IEEE Control Systems Magazine, 14, (1994) 53-59
    • (1994) IEEE Control Systems Magazine , vol.14 , pp. 53-59
    • Moon, I.1
  • 17
    • 0026617165 scopus 로고
    • Automatic verification of sequential control systems using temporal logic
    • Moon, I., Powers, G. J., Burch, J. R., Clarke, E. M. Automatic verification of sequential control systems using temporal logic, A.l.Ch.E. Journal, 38, 1992
    • (1992) A.l.Ch.E. Journal , vol.38
    • Moon, I.1    Powers, G.J.2    Burch, J.R.3    Clarke, E.M.4
  • 18
    • 84972541021 scopus 로고
    • A lattice-theoretical fixpoint theorem and its applications
    • A. Tarski, A lattice-theoretical fixpoint theorem and its applications, Pacific J. Math, 5, (1955) 285-309
    • (1955) Pacific J. Math , vol.5 , pp. 285-309
    • Tarski, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.