CMOS current steering logic: Toward a matured technique for mixed-mode applications

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1997, Pages 349-352

  Saez, R T L ^a   Kayal, M ^a   Declercq, M ^a  

^a EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DIGITAL CIRCUITS; ELECTRIC INVERTERS; ELECTRIC NETWORK ANALYSIS; LOGIC CIRCUITS; LOGIC GATES; SIGNAL NOISE MEASUREMENT; SPURIOUS SIGNAL NOISE; SWITCHING CIRCUITS;

CURRENT STEERING LOGIC (CSL); DIGITAL SWITCHING NOISE;

CMOS INTEGRATED CIRCUITS;

EID: 0030709071     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)