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Volumn E80-B, Issue 1, 1997, Pages 166-175
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Implementation of a digital signal processor in a DBF self-beam-steering array antenna
a,b
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Author keywords
Dbf antenna; DSP; FPGA ASIC; Maximal ratio combining; Self beam steering; Self phasing
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Indexed keywords
ANECHOIC CHAMBERS;
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
DIGITAL SIGNAL PROCESSING;
GATES (TRANSISTOR);
MOBILE TELECOMMUNICATION SYSTEMS;
DIGITAL BEAMFORMING (DBF) SELF BEAM STEERING ARRAY ANTENNA;
FIELD PROGRAMMABLE GATE ARRAY (FPGA);
ANTENNA PHASED ARRAYS;
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EID: 0030703945
PISSN: 09168516
EISSN: None
Source Type: Journal
DOI: None Document Type: Article |
Times cited : (11)
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References (12)
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