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Volumn E80-B, Issue 1, 1997, Pages 166-175

Implementation of a digital signal processor in a DBF self-beam-steering array antenna

Author keywords

Dbf antenna; DSP; FPGA ASIC; Maximal ratio combining; Self beam steering; Self phasing

Indexed keywords

ANECHOIC CHAMBERS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; GATES (TRANSISTOR); MOBILE TELECOMMUNICATION SYSTEMS;

EID: 0030703945     PISSN: 09168516     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (11)

References (12)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.