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Volumn , Issue , 1997, Pages 469-472

VLSI implementation of a 200-MHz 16×16 left-to-right carry-free multiplier in 0.35 μm CMOS technology for next-generation DSPs

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; BINARY CODES; BINARY SEQUENCES; CMOS INTEGRATED CIRCUITS; CODE CONVERTERS; INTEGRATED CIRCUIT LAYOUT; VLSI CIRCUITS;

EID: 0030701035     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (16)

References (9)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.