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Volumn , Issue , 1997, Pages 469-472
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VLSI implementation of a 200-MHz 16×16 left-to-right carry-free multiplier in 0.35 μm CMOS technology for next-generation DSPs
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Author keywords
[No Author keywords available]
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Indexed keywords
ADDERS;
BINARY CODES;
BINARY SEQUENCES;
CMOS INTEGRATED CIRCUITS;
CODE CONVERTERS;
INTEGRATED CIRCUIT LAYOUT;
VLSI CIRCUITS;
LEFT TO RIGHT MULTIPLIERS;
MULTIPLYING CIRCUITS;
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EID: 0030701035
PISSN: 08865930
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (16)
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References (9)
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