Two and three-dimensional modeling of VSPA butt solder joints

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 1997, Pages 472-478

  Murphy, R Sean ^a   Sitaraman, Suresh K ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING; MATHEMATICAL MODELS; PRINTED CIRCUIT BOARDS; STANDARDS; STRESSES; THERMAL EFFECTS; THERMAL EXPANSION;

PERIPHERAL ARRAY SEMICONDUCTOR PACKAGE (VSPA);

SOLDERED JOINTS;

EID: 0030686961     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)