Functional test pattern generation for CMOS operational amplifier

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1997, Pages 267-272

  Chang, Soon Jyh ^a   Lee, Chung Len ^a   Chen, Jwu E ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED NETWORK ANALYSIS; INTEGRATED CIRCUIT TESTING;

MIXED SIGNAL CIRCUITS; TEST PATTERN GENERATION;

OPERATIONAL AMPLIFIERS;

EID: 0030685979     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)