Memory-based architecture for very-high-throughput variable length codec design

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1997, Pages 2096-2099

  Lee, Yew San ^a   Jong, Jin Jer ^a   Perng, Tsyr Shiou ^a   Hsu, Li Chyun ^a   Jaw, Ming Yang ^a   Lee, Chen Yi ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BANDWIDTH COMPRESSION; CMOS INTEGRATED CIRCUITS; CODES (SYMBOLS); COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER ARCHITECTURE; COMPUTER SIMULATION; DATA COMPRESSION; DATA STORAGE EQUIPMENT; DECODING; ENCODING (SYMBOLS);

VARIABLE LENGTH CODE/DECODE (VLC/VLD) CODEC SYSTEMS;

VLSI CIRCUITS;

EID: 0030685337     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)