Hierarchy-driven FPGA partitioning method

Proceedings - Design Automation Conference

Volumn , Issue , 1997, Pages 522-525

  Krupnova, Helena ^a   Abbara, Ali ^a   Saucier, Gabriele ^a  

^a GRENOBLE INSTITUTE OF TECHNOLOGY   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; LOGIC DESIGN; MATHEMATICAL MODELS; SET THEORY; TREES (MATHEMATICS);

AUTOMATIC PARTITIONING METHOD; FIELD PROGRAMMABLE GATE ARRAYS;

LOGIC GATES;

EID: 0030681188     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)