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Volumn , Issue , 1997, Pages 179-182
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Architecture for a high speed fuzzy logic inference engine in FPGAs
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER ARCHITECTURE;
DATA PROCESSING;
FUZZY SETS;
INVERSE PROBLEMS;
LOGIC GATES;
MEMBERSHIP FUNCTIONS;
PARALLEL PROCESSING SYSTEMS;
RESPONSE TIME (COMPUTER SYSTEMS);
DATAPATH;
FIELD PROGRAMMABLE GATE ARRAYS;
FUZZY LOGIC INFERENCE ENGINE;
INFERENCE ENGINE ARCHITECTURE;
INFERENCE ENGINES;
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EID: 0030681159
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (1)
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References (6)
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