Reliable hardware barrier synchronization scheme

Proceedings of the International Parallel Processing Symposium, IPPS

Volumn , Issue , 1997, Pages 274-280

  Sivaram, Rajeev ^a   Stunkel, Craig B ^a   Panda, Dhabaleswar K ^a  

^a OHIO STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SOFTWARE; COMPUTER WORKSTATIONS; FAULT TOLERANT COMPUTER SYSTEMS; NETWORK PROTOCOLS; SWITCHING NETWORKS; SYNCHRONIZATION;

BARRIER SYNCHRONIZATION; MESSAGE PASSING PROTOCOLS;

PARALLEL PROCESSING SYSTEMS;

EID: 0030680678     PISSN: 10637133     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)