Minimal logic re-synthesis for engineering change

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1997, Pages 1596-1599

  Swamy, Gitanjali ^a   Rajamani, Sriram ^a   Lennard, Chris ^a   Brayton, Robert K ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; ITERATIVE METHODS; LOGIC GATES; PROBLEM SOLVING; SENSITIVITY ANALYSIS; THEOREM PROVING;

LOGIC SYNTHESIS; SENSITIVITY CRITERIA;

LOGIC DESIGN;

EID: 0030680518     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)