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Volumn , Issue , 1997, Pages 518-521
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Multi-way FPGA partitioning by fully exploiting design hierarch
a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTATIONAL COMPLEXITY;
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
HIERARCHICAL SYSTEMS;
LOGIC DESIGN;
FIELD PROGRAMMABLE GATE ARRAYS;
FIELD PROGRAMMABLE INTERCONNECT CHIPS;
LOGIC GATES;
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EID: 0030679992
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (5)
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References (12)
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