Circuit modeling of programmable logic gate based on controlled quenching of series-connected negative differential resistance devices

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1997, Pages 1628-1631

  Niu, G F ^a   Chen, K J ^a   Chen, R M M ^a   Ruan, G ^a   Waho, T ^a   Maezawa, K ^a   Yamamoto, M ^a  

^a CITY UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC NETWORK SYNTHESIS; NEGATIVE RESISTANCE; QUENCHING;

NEGATIVE DIFFERENTIAL RESISTANCE (NDR); PROGRAMMABLE LOGIC GATES;

LOGIC GATES;

EID: 0030679410     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)