1T/1C ferroelectric RAM using a double-level metal process for highly scalable nonvolatile memory

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1997, Pages 139-140

  Jung, Dong Jin ^a   Kang, Nam Soo ^a   Lee, Sung Yung ^a   Koo, Bon Jae ^a   Lee, Jin Woo ^a   Park, Joo Han ^a   Chun, Yoon Soo ^a   Lee, Mi Hyang ^a   Jeon, Byung Gil ^a   Lee, Sang In ^a   Shim, Tae Earn ^a   Hwang, Chang Gyu ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM PLATING; ANNEALING; CAPACITORS; CMOS INTEGRATED CIRCUITS; ELECTRIC PROPERTIES; FERROELECTRIC DEVICES; LEAKAGE CURRENTS; NONVOLATILE STORAGE; SEMICONDUCTOR DEVICE MANUFACTURE;

DOUBLE LEVEL METAL INTEGRATION PROCESS; FERROELECTRIC RANDOM ACCESS MEMORY (FRAM);

RANDOM ACCESS STORAGE;

EID: 0030679341     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)