FPGA routing and routability estimation via Boolean satisfiability

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 1997, Pages 119-125

  Wood, R Glenn ^a   Rutenbar, Rob A ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; DECISION TABLES; ESTIMATION; LOGIC DESIGN; LOGIC GATES;

BINARY DECISION DIAGRAMS (BDD); BOOLEAN SATISFIABILITY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); ROUTABILITY ESTIMATION;

PARALLEL PROCESSING SYSTEMS;

EID: 0030676579     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/258305.258322     Document Type: Conference Paper

References (23)