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Volumn 2, Issue , 1997, Pages 1340-1343
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Synthesis of parallel hardware implementations from synchronous dataflow graph specifications
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER HARDWARE;
DIGITAL SIGNAL PROCESSING;
SYNCHRONOUS DATAFLOW (SDF);
VERY HIGH SPEED INTEGRATED CIRCUIT HARDWARE DESCRIPTION LANGUAGES;
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
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EID: 0030674745
PISSN: 10586393
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (18)
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References (14)
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