![]() |
Volumn , Issue , 1997, Pages 656-661
|
Low power FPGA design - a re-engineering approach
a
|
Author keywords
[No Author keywords available]
|
Indexed keywords
ALGORITHMS;
BOOLEAN FUNCTIONS;
COMPUTATIONAL COMPLEXITY;
LOGIC GATES;
OPTIMIZATION;
FIELD PROGRAMMABLE GATE ARRAY;
PROGRAMMABLE LOGIC BLOCKS;
TECHNOLOGY MAPPING ALGORITHM;
LOGIC DESIGN;
|
EID: 0030672660
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/266021.266312 Document Type: Conference Paper |
Times cited : (16)
|
References (10)
|