0.18 μm CMOS process using nitrogen profile-engineered gate dielectrics

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1997, Pages 47-48

  Grider, D T ^a   Hattangady, S V ^a   Kraft, R ^a   Nicollian, P E ^a   Kuehne, J ^a   Brown, G ^a   Aur, S ^a   Eklund, R H ^a   Pas, M F ^a   Hunter, W R ^a   Douglas, M ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; GATES (TRANSISTOR); INTEGRATED CIRCUIT MANUFACTURE; NITRIDING; SEMICONDUCTOR DOPING; SILICA;

REMOTE PLASMA NITRIDATION (RPN);

CMOS INTEGRATED CIRCUITS;

EID: 0030655686     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)