Formal verification of content addressable memories using symbolic trajectory evaluation

Proceedings - Design Automation Conference

Volumn , Issue , 1997, Pages 167-172

  Pandey, Manish ^a   Raimi, Richard ^a   Bryant, Randal E ^a   Abadir, Magdy S ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; BUFFER STORAGE; ENCODING (SYMBOLS); INDUSTRIAL APPLICATIONS; MICROPROCESSOR CHIPS;

BLOCK ADDRESS TRANSLATION UNIT; BRANCH TARGET ADDRESS CACHE UNIT; FORMAL VERIFICATION TECHNIQUE; SYMBOLIC TRAJECTORY EVALUATION;

ASSOCIATIVE STORAGE;

EID: 0030651836     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/266021.266056     Document Type: Conference Paper

References (9)