Hardware/software codesign method for a general purpose reconfigurable co-processor

Hardware/Software Codesign - Proceedings of the International Workshop

Volumn , Issue , 1997, Pages 147-151

  Kimura, Shinji ^a   Yukishita, Mitsuteru ^a   Itou, Yasufumi ^a   Nagoya, Akira ^a   Hirao, Makoto ^a   Watanabe, Katumasa ^a  

^a NARA INSTITUTE OF SCIENCE AND TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); RECONFIGURABLE COPROCESSORS;

BUFFER STORAGE; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SOFTWARE; COMPUTER SYSTEMS;

COMPUTER AIDED DESIGN;

EID: 0030651827     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)