Methods to reduce test application time for accumulator-based self-test

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1997, Pages 48-53

  Stroele, Albrecht P ^a   Mayer, Frank ^a  

^a UNIVERSITY OF KARLSRUHE   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FAULT TOLERANT COMPUTER SYSTEMS; LOGIC CIRCUITS;

ACCUMULATOR BASED SELF TEST; EMBEDDED PROCESSORS; TEST PATTERN GENERATORS;

INTEGRATED CIRCUIT TESTING;

EID: 0030651782     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (21)