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Volumn , Issue , 1997, Pages 251-271
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DFT techniques for mixed-signal integrated circuits
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NONE
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Author keywords
[No Author keywords available]
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Indexed keywords
DIGITAL INTEGRATED CIRCUITS;
INTEGRATED CIRCUIT LAYOUT;
DESIGN FOR TESTING (DFT) METHOD;
MIXED SIGNAL INTEGRATED CIRCUITS;
INTEGRATED CIRCUIT TESTING;
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EID: 0030649562
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (7)
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References (29)
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